ZL9117M
Pin Configuration
ZL9117M
(21 LD QFN)
TOP VIEW
9
8
7
6
5
4
3
2
1
SDA
PGND
V25
VDD
VDRV
10
11
12
13
21
20
19
18
VSET
VTRK
FB+
FB-
SW
Pin Descriptions
VIN
15
PGND
16
14
VOUT
17
PIN
1
2
3
4
5
6
7
LABEL
SDA
SCL
SA
SYNC
PG
EN
DDC
TYPE
I/O
I/O
I
I/O
O
I
I/O
DESCRIPTION
Serial data. A pull-up resistor is required for this application.
Serial clock. A pull-up resistor is required for this application.
Serial address select pin. Used to assign unique SMBus address to each module.
Clock synchronization. Used for synchronization to external frequency reference.
Power-good output.
Enable input (factory setting active high). Pull-up to enable PWM switching and pull-down to disable PWM switching.
Digital-DC bus (open drain). Interoperability between Zilker Labs modules. A pull-up resistor is required for this
application.
8
9
10
11
12
13
14 (epad)
15 (epad)
16 (epad)
17 (epad)
18
19
20
21
VR
SGND
PGND
V25
VDD
VDRV
SW
VIN
PGND
VOUT
FB-
FB+
VTRK
VSET
PWR
PWR
PWR
PWR
PWR
PWR
PWR
PWR
PWR
PWR
I
I
I
I
Internal 5V reference used to power internal drivers. Connect 4.7 μ F bypass capacitor to this pin.
Signal ground. Connect to low impedance ground plane.
Power ground. Connect to low impedance ground plane.
Internal 2.5V reference used to power internal circuitry. Connect 4.7 μ F bypass capacitor to this pin.
Input supply voltage for controller. Connect 4.7 μ F bypass capacitor to this pin.
Power supply for internal FET drivers. Connect 10 μ F bypass capacitor to this pin.
Drive train switch node.
Power supply input FET voltage.
Power ground. Connect to low impedance ground plane.
Power supply output voltage. Output voltage from PWM.
Output voltage feedback. Connect to load return of ground regulation point.
Output voltage feedback. Connect to output regulation point.
Tracking sense input. Used to track an external voltage source.
Output voltage selection pin. Used to set V OUT set point and V OUT max.
2
FN7914.3
July 22, 2013
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